The company says it re-engineered its liquid-crystal-on-silicon (LCoS) backplane technology into a constant current drive configuration for microLED pixels based on its 0.26” diagonal (~3 µm pixel) 1080p display format. The solution, says the company, enables microLED developers to accelerate their time to market by bonding their devices to a backplane driven by CP's field-proven NOVA display drive architecture to enable complete display subsystems meeting critical augmented reality (AR) requirements for compactness, optical performance, and brightness with high frame rate, low latency, and low power consumption.
"Our custom, constant current pixel circuit design provides greater tolerance to forward voltage variation and IR drops in the microLED array resulting in a previously unattainable level of uniformity," says Ian Kyles, CP Vice President of Electrical/Software Engineering. "It additionally features globally on-the-fly programmable pixel current control that greatly increases the system bandwidth, enabling higher frame rates while maintaining full bit depth. The backplane also has additional steering pixels beyond its native 2048x1080 resolution to enhance alignment/integration of the display within the optical system."
microLED developers using this backplane can access the company's monolithic integrated display module (IDM) (measuring 7.25 x 15.5 x 3.1 mm) with a low-pin-count interconnect and a direct MIPI input packaged into a compact subsystem amenable to smaller optical engine size. The IDM integrates CP's proprietary NOVA drive architecture’s software defined platform to enable customizable frame-by-frame control of video frame rates (up to 240 Hz), bit depth, and other parameters to optimize for low latency, short persistence and low power while maintaining near 100% duty cycle according to type of image content and use case.
"Process integration compatibility is also important," says Andrew Shih, CP's Marketing and Business Development Manager, "as bonding of the microLED array to the backplane requires a highly planar interface. CP's backplane wafers feature excellent planarity, a direct benefit from extensive process tuning work to meet earlier LCoS requirements. By partnering with CP, whose backplane technology