Researchers there have manufactured scalable nanoprobe arrays small enough to record the inner workings of human cardiac cells and primary neurons.
In a paper published by Nature Nanotechnology, scientists from Surrey’s Advanced Technology Institute (ATI) and Harvard University described how that they had produced an ultra-small U-shaped nanowire field-effect transistor probe array for intracellular recording. The minute structure was used to clearly record the inner activity of primary neurons and other electrogenic cells. The device has the capacity for multi-channel recordings.
The ability to read electrical activities from cells is the foundation of many biomedical procedures. Developing new tools for intracellular electrophysiology (the electric current running within cells) that push the limits of what is physically possible (spatiotemporal resolution) while reducing invasiveness could provide a deeper understanding of electrogenic cells and their networks in tissues, as well as new directions for human-machine interfaces.
Dr Yunlong Zhao from the ATI at the University of Surrey said: “If our medical professionals are to continue to understand our physical condition better and help us live longer, it is important that we continue to push the boundaries of modern science in order to give them the best possible tools to do their jobs. For this to be possible, an intersection between humans and machines is inevitable.”
“Our ultra-small, flexible, nanowire probes could be a very powerful tool as they can measure intracellular signals with amplitudes comparable with those measured with patch clamp techniques; with the advantage of the device being scalable, it causes less discomfort and no fatal damage to the cell (cytosol dilation). Through this work, we found clear evidence for how both size and curvature affect device internalisation and intracellular recording signal.”
Professor Charles Lieber from the Department of Chemistry and Chemical Biology at Harvard University said: “This work represents a major step towards tackling the general problem of integrating ‘synthesized’ nanoscale building blocks into chip and wafer scale arrays, and thereby