Configurable computing platform solves car computing dillemma: Page 3 of 3

September 22, 2019 //By Christoph Hammerschmidt
Configurable computing platform solves car computing dillemma
It is no secret that in view of the ever-increasing volume of data in vehicles the automotive industry urgently needs new computing platforms and architectures. Xilinx is trying to satisfy this need with a new architectural approach: Adaptive Compute Acceleration Platforms (ACAPs) combine enormous computing power with unprecedented configuration flexibility.

But what exactly does such a chip contain, what is hidden in the housing with its many hundreds of connector pins? Depending on the version, these chips contain one or more dual-core processors from ARM's Cortex-A72 and Cortex-R5 series. In addition, there are up to 1900 floating-point DSP engines optimized for low-latency real-time tasks and up to 400 AI inference engines. The whole thing is garnished with a large block of programmable logic comprising around 1.9 million cells, as well as various memory blocks and interfaces for Ethernet, PCIe, MIPI and much more. Tu promises that the almost delay-free computing power will far exceed all previous arrangements of CPUs and GPUs. And the ACAPs are not supposed to outdo the established competition in terms of raw horsepower, but also in terms of flexibility: The different phases of driving place very different demands on the provision of computing power to the installed computers. When driving semi-automatically on the motorway, for example, other sensors are active than when parking. The ACAP architecture can combine these different requirements in a single chip - for this purpose, the configuration can be dynamically modified (see fig.2). Xilinx calls this feature Dynamic Function Exchange (DFX).

Fig. 2: Functions can be swapped dynamically (C) Xilinx


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