High-speed connectivity solutions provider Credo Technology Group has introduced its 112G PAM4 SerDes Intellectual Property (IP) family on TSMC’s advanced N5 and N4 process technologies. The comprehensive family supports a wide range of demands including long reach plus (LR+), long reach (LR), medium reach (MR), extreme short reach plus (XSR+), and extreme short reach (XSR), – required by applications including compute, switching, AI, machine learning, security, and optical deployments.
“Credo’s advanced mixed signal and DSP 112G PAM4 SerDes architectures were developed and proven on the TSMC 12nm process technology for Credo’s complete family of connectivity solutions for both copper and optical applications,” says Jim Bartenslager, Associate Vice President of Business Development for IP Products/ “We have ported our unique, purpose-built SerDes technology to the TSMC N5 and N4 processes to allow our partners and customers to seamlessly integrate our industry leading 112G PAM4 IP into larger scale monolithic and multi-chip-module ASICs.”
Its unique software programmable innovations, says the company, allow architects to optimize power and performance on a lane-by-lane basis, unleashing new levels of system level performance. The new 112G PAM4 SerDes IP were designed to meet the ever-growing data needs of high-speed, data-intensive applications and early access design customers can engage immediately by contacting the company. Production, silicon validation, design kit of these 112G SerDes for multiple TSMC processes from N16 to N4 are available on TSMC-Online.
The company’s SerDes technology is designed to enable silicon solution providers and OEMs to manufacture custom chip solutions that address new market opportunities, while delivering on critical performance and low-power system level requirements. All Credo IP solutions are supported with evaluation boards, simulation models, characterization reports, reliability reports, design libraries and a complete set of supporting documentation.