Robust Automotive Supply Protection for ISO 7637-2 and ISO 16750-2 Compliance: Page 7 of 9

October 22, 2017 //By Dan Eddleman, Linear Technology (Analog Devices)
Robust Automotive Supply Protection for ISO 7637-2 and ISO 16750-2 Compliance
Automotive power supplies produce formidable transients that can readily destroy exposed onboard electronics. Over time, as electronics have proliferated in vehicles, automotive manufacturers have duly noted failures, compiling a rogues’ gallery of the responsible power supply transients. Manufacturers have independently created standards and test procedures in an effort to prevent sensitive electronics from falling prey to these events. Recently, though, automotive manufacturers have combined efforts with the International Organization for Standardization (ISO) to develop the ISO 7637-2 and ISO 16750-2 standards, which describe the possible transients and specify test methods to simulate them.

Reverse Protection

MOSFET M1, in conjunction with D1, D2, R1, R3, R4, and Q1, protects the circuit from reverse voltage conditions. When the input falls below ground, Q1 pulls M1’s gate down to the negative input voltage, keeping the MOSFET off. This prevents reverse current flow when the battery is connected backward and protects the output from the negative input voltages.

D2 and R3 allow the LTC4380’s internal charge pump to enhance M1 during normal operation when the input is positive so that M1 is effectively a simple pass-through device, dissipating less than I2R = (4A)2 • 4.1mΩ = 66mW of power in the NXP PSMN4R8-100BSE.

SOA Limit

When the input voltage is high, the output voltage of this circuit is limited to a safe level by controlling MOSFET M2. This results in significant power dissipation as voltage is dropped across M2 while current is delivered to the load at the output.

If the input is subjected to a sustained overvoltage condition, or an overcurrent fault condition occurs in the onboard electronics at the circuit’s output, M2 is protected by shutting off after a duration configured by the timer network made up of R13, R14, R15, C4, C5, C6, and C14. The output current at the LTC4380’s TMR pin is proportional to the voltage across MOSFET M2 while M2 is in current limit.

Effectively, the TMR current is proportional to the power dissipated in MOSFET M2. The resistor/capacitor network at the TMR pin is similar to an electrical model of the MOSFET’s transient thermal impedance. This serves to limit the maximum temperature rise of the MOSFET to keep it within its rated safe operating area.

Because allowable MOSFET SOA current falls off at high drain-to-source voltages, the 20V avalanche diode D6, in conjunction with R9, R11, and Q3 provides extra current into the timer network when the IN-to-OUT voltage exceeds 20V plus Q3’s base-emitter voltage. The 4.7V avalanche diode D7 works with Q4, R12, and C3 to prevent this extra current from pulling the TMR pin above its maximum rated voltage of 5V. 

This SOA tracking circuit allows the output to remain safely powered when the input rises to a high voltage. But, if a sustained high power fault condition lasts too long, the circuit self-protects by shutting off M2.

Thermal Protection

The resistor/capacitor network on the LTC4380’s TMR pin protects against events that are faster than about one second. For slower events, the case temperature of M2 is limited by the circuit connected to the LTC4380’s ON pin.

Design category: 

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