Easy and flexible PCB panel testing: Page 2 of 4

November 26, 2019 //By M. Bader, J. Holzinger, O. Rohrbacher, Digitaltest GmbH
Easy and flexible PCB panel testing
PCB panelization has become a trend in electronic manufacturing in recent years, because of its power to save on resources. When it comes to testing on the panel, however, many refrained, as long as faults could come back into the board during the separation process. There are now consistent solutions available that facilitate the overall process and are flexibly adaptable.

Simple and secure test fixture design

The more boards to be tested there are on one panel, the more complex the design of the respective test fixture. Until now, even that was manual work or it was left up to the fixture-house, but by this the user lost influence, e.g. on the allocation of channel numbers (i.e. the numbering of the test pins). Test fixtures cost a lot of money, so their conception and manufacturing must be fault free. C-LINK significantly facilitates reliable planning of a test fixture (Fig. 2). This can be created fully automatically or partially manually, as desired.


Figure 2: The C-LINK DTM software supports simple and reliable test fixture design.
Here in the examples, board numbering (2a) and test probe positioning (2b).

In addition, for example, if a pin of the test fixture is manually placed on a PCB, then the position can be transferred to all boards of the panel. The label positions for the pins or the pin properties themselves can also be created only once on a circuit instance and then transferred to all other PCBs. That way no redundancies arise that could lead to annoying faults with subsequent changes. The allocation of the channel numbers is also flexible and “readably” possible with the software with optimal utilization of the available tester hardware. Finally, fixture documentation with all the individual channel numbers of the entire panel is generated. In the end, this facilitates the test documentation and traceability. Fixtures with the possibility to test also individual circuits, for example field returns, are also easy to plan (Fig. 3).


Figure 3: C-LINK DTM also supports the planning of test fixtures
that can be used to test individual circuits

Design category: 

Vous êtes certain ?

Si vous désactivez les cookies, vous ne pouvez plus naviguer sur le site.

Vous allez être rediriger vers Google.